Photo of Cheng WANG


Cheng WANG

He challenged the technical limit of quantum metrology, and generated original, disruptive, and valuable products.

Year Honored

University of Electronic Science and Technology of China

Cheng Wang is conducting multidisciplinary research that pushes the frontier of the combination of quantum information technology (quantum manipulation and sensing) and advanced CMOS integrated circuits.

Wang proposed and demonstrated the Chip-Scale Molecular Clocks (CSMCs), which take the rotational spectra of Carbonyl Sulfide (OCS) molecules as its precise physical frequency reference. Supported by the highly integrated spectroscopic system-on-chip (SoC), CSMC is a highly stable, miniaturized, massively deployable, environmentally robust time reference.

In 2020, the 2(nd)-gen CSMC has been published and demonstrated in ISSCC (the flag-ship conference in IC field). On May 17th, 2022, the Defense Advanced Research Projects Agency (DARPA) of the United States launched the H6 program for the next generation miniaturized clocks. DARPA has selected CSMC as one of two key technological paths, aiming at a weekly clock error less than 1µs.

On June 23th, the 3(rd)-gen CSMC was published on RFIC 2022 (another tier-1 conference in IC field). Up to this point, 2 lab-scale and 3 chip-scale CSMC prototypes have been demonstrated. The CSMCs are stepping firmly towards practical, large-scale deployment now.

After moving back to China, aside from further development of CSMCs, Wang’s group (Integrated Physics Group, IPG in UESTC) launched the research on cryogenic CMOS integrated circuits for large-scale Quantum-bit manipulation and sensing, first in China.

They have conducted multiple rounds of cryogenic CMOS chips tape-out so far. In Jan. 2022, the 1st cryogenic CMOS chips have been successfully demonstrated, including parametric frequency divider, 20-bit digital-to-analog converter and voltage control oscillator in 4K. Recently, in ISSCC 2023, Cheng and his group demonstrated a cryogenic (4.2K) voltage controlled oscillator (VCO), which achieves a new record figure-of-merit (FoM) of 202.3dBc/Hz on main-stream CMOS technology. They are targeting the 1st cryogenic chip that enables parallel manipulation and sensing of 1000 Qubits in 2-3 years, first in the world.